CV32E40P is a 32-bit RISC-V processor core. It is an in-order, 4 stage pipeline CPU optimized for edge- computing platforms. This is the first entry of the CORE-V. This energy-efficient core mostly found its applications in multicore platforms. It uses the RV32IM[F]C instruction set architecture as well as the Xpulp custom extensions to achieve greater code density, performance, and energy efficiency. This core doesn’t support bit manipulation extension. We are contributing in the open source community of RISC-V on the behalf of the Namal University Mianwali, Pakistan by adding the Zba extensions in the CV32E40P core.
Tools: Linux Ubuntu OS, GCC Toolchain,Verilator to simulate the core
Department: Department of Electrical Engineering