Design and Development of Video Processing Accelerator on FPGA

In industrial applications, detecting high-speed objects requires low latency to ensure the system processes and reacts before the object moves out of range. This project presents a real-time, low-latency video processing accelerator implemented on the Starlight PZ7020 FPGA board, based on the Xilinx Zynq- 7020 SoC. The platform tightly integrates an ARM Cortex-A9 Processing System (PS) with Xilinx Programmable Logic (PL), enabling efficient hardware–software co-design. The system interfaces with an OV5640 5MP CMOS image sensor through a DVP parallel interface, with runtime configuration handled by the ARM processor via the SCCB/I2C protocol. The captured video stream is processed within the programmable logic using fully pipelined architecture, incorporating RGB-to- Grayscale conversion and object detection using thresholding. To support continuous and efficient data flow, an AXI VDMA controller manages triple- frame buffering in DDR3 memory using high-bandwidth AXI4-Full burst transactions, effectively decoupling the camera acquisition pipeline from the display output path. The processed video is transmitted to an HDMI display through an AXI4-Stream to Video Out module, synchronized by a Video Timing Controller (VTC). The overall design employs three AXI communication protocols: AXI4-Stream for pixel data transfer, AXI4-Lite for runtime configuration, and AXI4-Full for high-performance memory access, ensuring balanced and efficient system architecture.

Poster